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tmeissner
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libvhdl
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2 Commits (a6169f1cdb38ef24b690bf71caddadc8b0f86b92)
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T. Meissner
389b3470f1
add cpha parameter do spi_master & spi_slave; change unit test to check all combinations of cpol & cpha
10 years ago
T. Meissner
58478fa5f0
add new SimP package with various general useful testbench procedures like spi master & slave
10 years ago