Library of reusable VHDL components
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T. Meissner 034b10cdc9 change G_SCLK_DIVIDER range start to 6 (lowest working divider value) and adapt assertion to new range 10 years ago
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SpiMasterE.vhd change G_SCLK_DIVIDER range start to 6 (lowest working divider value) and adapt assertion to new range 10 years ago
SpiSlaveE.vhd fixed reset initialisation of s_sclk_d 10 years ago