Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
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  1. [tasks]
  2. bmc
  3. [options]
  4. depth 25
  5. bmc: mode bmc
  6. [engines]
  7. bmc: smtbmc z3
  8. [script]
  9. bmc: ghdl --std=08 __ISSUE__.vhd -e issue
  10. prep -top issue
  11. [files]
  12. __ISSUE__.vhd