Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
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  1. [tasks]
  2. prove
  3. [options]
  4. depth 25
  5. prove: mode bmc
  6. [engines]
  7. prove: smtbmc z3
  8. [script]
  9. prove: ghdl --std=08 pkg.vhd sequencer.vhd psl_logical_implication.vhd -e psl_logical_implication
  10. prep -top psl_logical_implication
  11. [files]
  12. ../src/pkg.vhd
  13. ../src/sequencer.vhd
  14. ../src/psl_logical_implication.vhd