Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
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- [tasks]
- bmc
-
- [options]
- depth 25
- bmc: mode bmc
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- [engines]
- bmc: smtbmc z3
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- [script]
- bmc: ghdl --std=08 pkg.vhd sequencer.vhd yosys_anyseq.vhd -e yosys_anyseq
- prep -top yosys_anyseq
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- [files]
- ../src/pkg.vhd
- ../src/sequencer.vhd
- ../src/yosys_anyseq.vhd
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