tmeissner/psl_with_ghdl - psl_with_ghdl - goodcleanfun Gitea

Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)

vhdl ghdl psl assertions formal yosys

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Add tests for formal verification; optimizations; fixes #3 * Minor optimization in sequencer unit * Add Makefile & SymbiYosys command files for formal verification tests

4 years ago

Change sby task name from prove to bmc (we do bmc, not unbounded prove)

4 years ago

Add tests for formal verification; optimizations; fixes #3 * Minor optimization in sequencer unit * Add Makefile & SymbiYosys command files for formal verification tests

4 years ago

include tests.mk


.PHONY: all clean

all: ${psl_tests}


%: ../src/%.vhd ../src/pkg.vhd ../src/sequencer.vhd ../src/hex_sequencer.vhd %.sby
	mkdir -p work
	-sby --yosys "yosys -m ghdl" -f -d work/$@ $@.sby bmc


clean:
	rm -rf work