Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
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  1. [![tests](https://github.com/tmeissner/psl_with_ghdl/workflows/tests/badge.svg?branch=master)](https://github.com/tmeissner/psl_with_ghdl/actions?query=workflow%3Atests)
  2. # psl_with_ghdl
  3. A collection of examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys).
  4. This is a project with the purpose to get a current state of PSL implementation in GHDL. It probably will find unsupported PSL features, incorrect implemented features or simple bugs like GHDL crashs.
  5. It is also intended for experiments with PSL when learning the language. You can play around with the examples, as they are pretty simple. You can comment out failing assertions if you want to have a successful proof or simulation if you want. You can change them to see what happens. Have fun!
  6. The next two lists will grow during further development
  7. ## PSL features supported by GHDL:
  8. * assert directive
  9. * cover directive
  10. * assume directive (synthesis)
  11. * restrict directive (synthesis)
  12. * always operator
  13. * never operator
  14. * implication operator
  15. * next operator
  16. * next[n] operator
  17. * next_a[i to j] operator
  18. * next_e[i to j] operator
  19. * next_event operator
  20. * next_event[n] operator
  21. * until operator
  22. * until_ operator
  23. * before operator (GHDL crash with a specific property, see psl_before.vhd)
  24. * eventually! operator (simulation, synthesis produces a GHDL crash, see psl_eventually.vhd)
  25. ## PSL features not yet supported by GHDL:
  26. * next_event_a[i to j] operator
  27. * next_event_e[i to j] operator
  28. ## PSL features supported by GHDL but with wrong behaviour
  29. * before_ operator (Seems that LHS & RHS of operator have to be active at same cycle, see psl_before.vhd)