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psl_with_ghdl
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Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
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psl_with_ghdl/formal/psl_always.sby

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Add tests for formal verification; optimizations; fixes #3 * Minor optimization in sequencer unit * Add Makefile & SymbiYosys command files for formal verification tests
5 years ago
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  1. [tasks]
  2. prove
  3. 

  4. [options]
  5. depth 25
  6. prove: mode bmc
  7. 

  8. [engines]
  9. prove: smtbmc z3
  10. 

  11. [script]
  12. prove: ghdl --std=08 pkg.vhd sequencer.vhd psl_always.vhd -e psl_always
  13. prep -top psl_always
  14. 

  15. [files]
  16. ../src/pkg.vhd
  17. ../src/sequencer.vhd
  18. ../src/psl_always.vhd