This website works better with JavaScript.
Home
Help
Sign In
tmeissner
/
psl_with_ghdl
Watch
1
Star
0
Fork
0
Code
Issues
0
Pull Requests
0
Releases
0
Wiki
Activity
Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
vhdl
ghdl
psl
assertions
formal
yosys
You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
12
Commits
1
Branch
389 KiB
Tree:
ffe07fd5b4
master
Branches
Tags
${ item.name }
Create branch
${ searchTerm }
from 'ffe07fd5b4'
${ noResults }
psl_with_ghdl
/
formal
/
tests.mk
7 lines
98 B
Raw
Normal View
History
Add tests for formal verification; optimizations; fixes #3 * Minor optimization in sequencer unit * Add Makefile & SymbiYosys command files for formal verification tests
5 years ago
Add example for next_event[n] operator * Add example for next_event[n] operator * Add formal test for next_event[n] operator * Add next_event[n] to supported list * Add next_event_a[n] & next_event_e[n] to unsupported list
5 years ago
psl_tests
:=
\
p
s
l
_
a
l
w
a
y
s
\
p
s
l
_
n
e
v
e
r
\
p
s
l
_
n
e
x
t
\
p
s
l
_
n
e
x
t
_
3
\
p
s
l
_
n
e
x
t
_
e
v
e
n
t
\
p
s
l
_
n
e
x
t
_
e
v
e
n
t
_
4