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Add SERE goto [->n] operator, was fixed by ghdl/ghdl#1322

master
T. Meissner 5 years ago
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3e0daf5e51
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      README.md
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      formal/psl_sere_non_consecutive_goto_repetition.sby
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      src/psl_sere_non_consecutive_goto_repetition.vhd

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README.md View File

@ -50,13 +50,13 @@ The next lists will grow during further development
* Non overlapping suffix implication operator (|=>) * Non overlapping suffix implication operator (|=>)
* Consecutive repetition operator ([*], [+], [*n], [*i to j]) * Consecutive repetition operator ([*], [+], [*n], [*i to j])
* Non consecutive repetition operator ([=n], [=i to j]) * Non consecutive repetition operator ([=n], [=i to j])
* Non consecutive goto repetition operator ([->], [->n], [->i to j])
* within operator * within operator
## PSL features not yet supported by GHDL: ## PSL features not yet supported by GHDL:
* forall statement * forall statement
* Synthesis of strong operator versions * Synthesis of strong operator versions
* SERE goto repetition operator ([->], [->n], [->i to j])
## PSL features under investigation ## PSL features under investigation


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formal/psl_sere_non_consecutive_goto_repetition.sby View File

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[tasks]
bmc
[options]
depth 25
bmc: mode bmc
[engines]
bmc: smtbmc z3
[script]
bmc: ghdl --std=08 pkg.vhd sequencer.vhd psl_sere_non_consecutive_goto_repetition.vhd -e psl_sere_non_consecutive_goto_repetition
prep -top psl_sere_non_consecutive_goto_repetition
[files]
../src/pkg.vhd
../src/sequencer.vhd
../src/psl_sere_non_consecutive_goto_repetition.vhd

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src/psl_sere_non_consecutive_goto_repetition.vhd View File

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library ieee;
use ieee.std_logic_1164.all;
use work.pkg.all;
entity psl_sere_non_consecutive_goto_repetition is
port (
clk : in std_logic
);
end entity psl_sere_non_consecutive_goto_repetition;
architecture psl of psl_sere_non_consecutive_goto_repetition is
signal req, busy, done : std_logic;
begin
-- 0123456789
SEQ_REQ : sequencer generic map ("_-_______") port map (clk, req);
SEQ_BUSY : sequencer generic map ("__-_-_-__") port map (clk, busy);
SEQ_DONE : sequencer generic map ("_______-_") port map (clk, done);
-- All is sensitive to rising edge of clk
default clock is rising_edge(clk);
-- Non consecutive repetition of 3 cycles without padding
-- busy has to hold on 3 cycles between req & done
-- This assertion holds
SERE_0_a : assert always {req} |=> {busy[->3]; done};
-- Non consecutive repetition of 2 to 4 cycles without padding
-- busy has to hold on 2 to 4 cycles between req & done
-- This assertion holds
SERE_1_a : assert always {req} |=> {busy[->2 to 4]; done};
-- Non consecutive repetition of 5 cycles without padding
-- busy has to hold on 5 cycles between req & done
-- This assertion holds -> possible PITFALL!
-- RHS is underspecified, nothing prevents done to hold between or together
-- with holding busy. For intentioned behaviour, the behaviour of done
-- has to be described more specificly (see SERE_3_a)
SERE_2_a : assert always {req} |=> {busy[->5]; done};
-- Non consecutive repetition of 3 cycles without padding
-- busy has to hold on 3 cycles between req & and the first done
-- This is a more exact version of the assertions before using the
-- within SERE operator (busy[*3] has to hold during done don't holds)
-- This assertion holds
SERE_3_a : assert always {req} |=> {{{busy[->3]} within {not done[+]}}; done};
-- Non consecutive repetition of 4 cycles without padding
-- busy has to hold on 4 cycles between req & and the first done
-- This assertion doesn't hold at cycle 7
SERE_4_a : assert always {req} |=> {{{busy[->4]} within {not done[+]}}; done};
-- At least one occurance of busy directly in the cycle before done holds
-- This assertion holds
SERE_5_a : assert always {req} |=> {{{busy[->]} within {not done[+]}}; done};
end architecture psl;

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