Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
				
			 
			
		 
		
		
		
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							|  | [tasks] | 
						
						
							|  | bmc | 
						
						
							|  | 
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							|  | [options] | 
						
						
							|  | depth 25 | 
						
						
							|  | bmc: mode bmc | 
						
						
							|  | 
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							|  | [engines] | 
						
						
							|  | bmc: smtbmc z3 | 
						
						
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							|  | [script] | 
						
						
							|  | bmc: ghdl --std=08 pkg.vhd sequencer.vhd psl_sere_len_matching_and.vhd -e psl_sere_len_matching_and | 
						
						
							|  | prep -top psl_sere_len_matching_and | 
						
						
							|  | 
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							|  | [files] | 
						
						
							|  | ../src/pkg.vhd | 
						
						
							|  | ../src/sequencer.vhd | 
						
						
							|  | ../src/psl_sere_len_matching_and.vhd
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