Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
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[tasks]
prove
[options]
depth 25
prove: mode bmc
[engines]
prove: smtbmc z3
[script]
prove: ghdl --std=08 pkg.vhd sequencer.vhd psl_sere.vhd -e psl_sere
prep -top psl_sere
[files]
../src/pkg.vhd
../src/sequencer.vhd
../src/psl_sere.vhd