Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
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psl_tests := \
psl_always \
psl_never \
psl_next \
psl_next_3 \
psl_next_a \
psl_next_event \
psl_next_event_4 \
psl_until \
psl_before \
psl_eventually