Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
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psl_tests := \
issue_1288 \
issue_1292 \
issue_1314 \
issue_1321 \
issue_1322 \
issue_1345 \
issue_1366 \
issue_1367 \
issue_1372 \
issue_1591