Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
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[tasks]
bmc
[options]
depth 25
bmc: mode bmc
[engines]
bmc: smtbmc z3
[script]
bmc: ghdl --std=08 pkg.vhd sequencer.vhd psl_always.vhd -e psl_always
prep -top psl_always
[files]
../src/pkg.vhd
../src/sequencer.vhd
../src/psl_always.vhd