Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
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tests

psl_with_ghdl

A collection of examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys).

The next two lists will grow during further development

PSL features supported by GHDL:

  • assert directive
  • cover directive
  • assume directive (synthesis)
  • restrict directive (synthesis)
  • always operator
  • never operator
  • implication operator
  • next operator
  • next[n] operator
  • next_event operator
  • next_event[n] operator
  • until operator
  • until_ operator
  • eventually! operator (simulation, synthesis throws an error)

PSL features not yet supported by GHDL:

  • next_a[i:j] operator
  • next_e[i:j] operator
  • next_event_a[i:j] operator
  • next_event_e[i:j] operator