Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
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psl_tests := \
psl_always \
psl_logical_implication \
psl_never \
psl_next \
psl_next_3 \
psl_next_a \
psl_next_e \
psl_next_event \
psl_next_event_4 \
psl_next_event_e \
psl_next_event_a \
psl_until \
psl_before \
psl_eventually \
psl_sere \
psl_sere_overlapping_suffix_impl \
psl_sere_non_overlapping_suffix_impl \
psl_sere_consecutive_repetition \
psl_sere_non_consecutive_repeat_repetition \
psl_sere_non_consecutive_goto_repetition \
psl_cover \
psl_sere_within \
psl_sere_or \
psl_sere_len_matching_and \
psl_sere_non_len_matching_and \
psl_sere_concat \
psl_sere_fusion \
psl_prev \
psl_stable \
psl_rose \
psl_fell \
psl_logical_iff \
psl_vunit \
yosys_anyconst \
yosys_anyseq