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@ -0,0 +1,28 @@ |
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library ieee; |
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use ieee.std_logic_1164.all; |
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use ieee.numeric_std.all; |
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library machxo2; |
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use machxo2.components.all; |
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entity RaspiFpgaE is |
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port ( |
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--+ SPI slave if |
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SpiSclk_i : in std_logic; |
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SpiSte_i : in std_logic; |
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SpiMosi_i : in std_logic; |
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SpiMiso_o : out std_logic |
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); |
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end entity RaspiFpgaE; |
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architecture rtl of RaspiFpgaE is |
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begin |
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end architecture rtl; |