tmeissner
/
usb-avr-cpld
1
0
Fork 0
Code Issues 0 Pull Requests 0 Releases 1 Wiki Activity
usb-avr-cpld experiment board with FTDI FT232RL, ATMEGA88 & XC9572XL
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
19 Commits
1 Branch
1.2 MiB
 
 
 
 
Tree: b8d183c04c
Branches Tags
${ item.name }
Create branch ${ searchTerm }
from 'b8d183c04c'
${ noResults }
 ZIP  TAR.GZ
T. Meissner b8d183c04c declaration of F_CPU now in the makefile, only check in the c-source, if it was forgotten 12 years ago
avr declaration of F_CPU now in the makefile, only check in the c-source, if it was forgotten 12 years ago
cpld change timespec name from TS_Clk_i to TS_XcClk_i 12 years ago
eagle initial commit of design rules for manufacturing the pcb at q-print 12 years ago
pics update to latest schematic & board revision, now version 0.1 which is 12 years ago
README.textile added description of the 'cpld' which contains the cpld test design 12 years ago

README.textile 

h1. "usb-avr-cpld":https://github.com/tmeissner/usb-avr-cpld

p(. A small experiment board with usb-connector, usb-serial bridge, avr controller & xilinx cpld

!https://lh5.googleusercontent.com/-Al2Op9EDc1Q/UGHuXh1WkdI/AAAAAAAABss/sLXzn2gTk9k/s0-d/usb-avr-cpld.jpg!

h3. Board's main parts:

* Ftdi FD232RL USB-UART bridge
* Atmel Atmega88
* Xilinx XC9572XL CPLD

h3. Test FW:

The folder "avr":https://github.com/tmeissner/usb-avr-cpld/tree/master/avr contains a avr-gcc project with test routines for the Atmega88 controller.
It checks for the interfaces to the other devices. At the moment, a simply uart loop to the FT232RL
is implemented.

The folder "cpld":https://github.com/tmeissner/usb-avr-cpld/tree/master/cpld contains a xilinx ise / ghdl project with test design for the CPLD.
It checks for the interfaces to the other devices. At the moment, putting a simple "10101" pattern on the gpio pins is implemented.