cryptography ip-cores in vhdl / verilog
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  1. # ======================================================================
  2. # DES encryption/decryption
  3. # algorithm according to FIPS 46-3 specification
  4. # Copyright (C) 2012 Torsten Meissner
  5. #-----------------------------------------------------------------------
  6. # This program is free software; you can redistribute it and/or modify
  7. # it under the terms of the GNU General Public License as published by
  8. # the Free Software Foundation; either version 2 of the License, or
  9. # (at your option) any later version.
  10. # This program is distributed in the hope that it will be useful,
  11. # but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. # GNU General Public License for more details.
  14. # You should have received a copy of the GNU General Public License
  15. # along with this program; if not, write to the Free Software
  16. # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  17. # ======================================================================
  18. SRC_FILES = ../../rtl/verilog/*.v tb_des.v
  19. SIM_FILES = data_input.txt key_input.txt data_output.txt
  20. all : sim wave
  21. sim : tb_des.vcd
  22. tb_des.vcd : $(SRC_FILES) $(SIM_FILES)
  23. iverilog -Wall -s tb_des -o tb_des tb_des.v ../../rtl/verilog/des.v
  24. vvp tb_des
  25. wave : tb_des.vcd
  26. gtkwave -T tb_des.tcl tb_des.vcd
  27. clean :
  28. echo "# cleaning simulation files"
  29. rm -f tb_des
  30. rm -f tb_des.vcd