cryptography ip-cores in vhdl / verilog
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  1. -- ======================================================================
  2. -- DES encryption/decryption testbench
  3. -- tests according to NIST 800-16 special publication
  4. -- Copyright (C) 2011 Torsten Meissner
  5. -------------------------------------------------------------------------
  6. -- This program is free software; you can redistribute it and/or modify
  7. -- it under the terms of the GNU General Public License as published by
  8. -- the Free Software Foundation; either version 2 of the License, or
  9. -- (at your option) any later version.
  10. -- This program is distributed in the hope that it will be useful,
  11. -- but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. -- GNU General Public License for more details.
  14. -- You should have received a copy of the GNU General Public License
  15. -- along with this program; if not, write to the Free Software
  16. -- Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  17. -- ======================================================================
  18. -- Revision 1.0 2011/09/17
  19. -- Initial release
  20. -- Revision 1.0.1 2011/09/18
  21. -- tests partial adopted to NIST 800-16 publication
  22. -- Revision 1.0.2 2011/09/18
  23. -- includes more tests of NIST 800-16 publication
  24. library ieee;
  25. use ieee.std_logic_1164.all;
  26. use ieee.numeric_std.all;
  27. entity tb_des is
  28. end entity tb_des;
  29. architecture rtl of tb_des is
  30. type t_array is array (natural range <>) of std_logic_vector(0 to 63);
  31. signal s_variable_plaintext_known_answers : t_array(0 to 63) :=
  32. (x"95F8A5E5DD31D900", x"DD7F121CA5015619", x"2E8653104F3834EA",
  33. x"4BD388FF6CD81D4F", x"20B9E767B2FB1456", x"55579380D77138EF",
  34. x"6CC5DEFAAF04512F", x"0D9F279BA5D87260", x"D9031B0271BD5A0A",
  35. x"424250B37C3DD951", x"B8061B7ECD9A21E5", x"F15D0F286B65BD28",
  36. x"ADD0CC8D6E5DEBA1", x"E6D5F82752AD63D1", x"ECBFE3BD3F591A5E",
  37. x"F356834379D165CD", x"2B9F982F20037FA9", x"889DE068A16F0BE6",
  38. x"E19E275D846A1298", x"329A8ED523D71AEC", x"E7FCE22557D23C97",
  39. x"12A9F5817FF2D65D", x"A484C3AD38DC9C19", x"FBE00A8A1EF8AD72",
  40. x"750D079407521363", x"64FEED9C724C2FAF", x"F02B263B328E2B60",
  41. x"9D64555A9A10B852", x"D106FF0BED5255D7", x"E1652C6B138C64A5",
  42. x"E428581186EC8F46", x"AEB5F5EDE22D1A36", x"E943D7568AEC0C5C",
  43. x"DF98C8276F54B04B", x"B160E4680F6C696F", x"FA0752B07D9C4AB8",
  44. x"CA3A2B036DBC8502", x"5E0905517BB59BCF", x"814EEB3B91D90726",
  45. x"4D49DB1532919C9F", x"25EB5FC3F8CF0621", x"AB6A20C0620D1C6F",
  46. x"79E90DBC98F92CCA", x"866ECEDD8072BB0E", x"8B54536F2F3E64A8",
  47. x"EA51D3975595B86B", x"CAFFC6AC4542DE31", x"8DD45A2DDF90796C",
  48. x"1029D55E880EC2D0", x"5D86CB23639DBEA9", x"1D1CA853AE7C0C5F",
  49. x"CE332329248F3228", x"8405D1ABE24FB942", x"E643D78090CA4207",
  50. x"48221B9937748A23", x"DD7C0BBD61FAFD54", x"2FBC291A570DB5C4",
  51. x"E07C30D7E4E26E12", x"0953E2258E8E90A1", x"5B711BC4CEEBF2EE",
  52. x"CC083F1E6D9E85F6", x"D2FD8867D50D2DFE", x"06E7EA22CE92708F",
  53. x"166B40B44ABA4BD6");
  54. signal s_variable_key_known_answers : t_array(0 to 55) :=
  55. (x"95A8D72813DAA94D", x"0EEC1487DD8C26D5", x"7AD16FFB79C45926",
  56. x"D3746294CA6A6CF3", x"809F5F873C1FD761", x"C02FAFFEC989D1FC",
  57. x"4615AA1D33E72F10", x"2055123350C00858", x"DF3B99D6577397C8",
  58. x"31FE17369B5288C9", x"DFDD3CC64DAE1642", x"178C83CE2B399D94",
  59. x"50F636324A9B7F80", x"A8468EE3BC18F06D", x"A2DC9E92FD3CDE92",
  60. x"CAC09F797D031287", x"90BA680B22AEB525", x"CE7A24F350E280B6",
  61. x"882BFF0AA01A0B87", x"25610288924511C2", x"C71516C29C75D170",
  62. x"5199C29A52C9F059", x"C22F0A294A71F29F", x"EE371483714C02EA",
  63. x"A81FBD448F9E522F", x"4F644C92E192DFED", x"1AFA9A66A6DF92AE",
  64. x"B3C1CC715CB879D8", x"19D032E64AB0BD8B", x"3CFAA7A7DC8720DC",
  65. x"B7265F7F447AC6F3", x"9DB73B3C0D163F54", x"8181B65BABF4A975",
  66. x"93C9B64042EAA240", x"5570530829705592", x"8638809E878787A0",
  67. x"41B9A79AF79AC208", x"7A9BE42F2009A892", x"29038D56BA6D2745",
  68. x"5495C6ABF1E5DF51", x"AE13DBD561488933", x"024D1FFA8904E389",
  69. x"D1399712F99BF02E", x"14C1D7C1CFFEC79E", x"1DE5279DAE3BED6F",
  70. x"E941A33F85501303", x"DA99DBBC9A03F379", x"B7FC92F91D8E92E9",
  71. x"AE8E5CAA3CA04E85", x"9CC62DF43B6EED74", x"D863DBB5C59A91A0",
  72. x"A1AB2190545B91D7", x"0875041E64C570F7", x"5A594528BEBEF1CC",
  73. x"FCDB3291DE21F0C0", x"869EFD7F9F265A09");
  74. signal s_clk : std_logic := '0';
  75. signal s_mode : std_logic := '0';
  76. signal s_key : std_logic_vector(0 to 63) := (others => '0');
  77. signal s_datain : std_logic_vector(0 to 63) := (others => '0');
  78. signal s_validin : std_logic := '0';
  79. signal s_dataout : std_logic_vector(0 to 63);
  80. signal s_validout : std_logic;
  81. component des is
  82. port (
  83. clk_i : in std_logic;
  84. mode_i : in std_logic;
  85. key_i : in std_logic_vector(0 TO 63);
  86. data_i : in std_logic_vector(0 TO 63);
  87. valid_i : in std_logic;
  88. data_o : out std_logic_vector(0 TO 63);
  89. valid_o : out std_logic
  90. );
  91. end component des;
  92. begin
  93. s_clk <= not(s_clk) after 10 ns;
  94. teststimuliP : process is
  95. begin
  96. s_mode <= '0';
  97. s_validin <= '0';
  98. s_key <= x"0101010101010101";
  99. s_datain <= x"8000000000000000";
  100. -- Variable plaintext known answer test
  101. -- Encryption
  102. for index in s_variable_plaintext_known_answers'range loop
  103. wait until rising_edge(s_clk);
  104. s_validin <= '1';
  105. if(index /= 0) then
  106. s_datain <= '0' & s_datain(0 to 62);
  107. end if;
  108. end loop;
  109. wait until rising_edge(s_clk);
  110. s_mode <= '0';
  111. s_validin <= '0';
  112. s_key <= (others => '0');
  113. s_datain <= (others => '0');
  114. wait for 100 ns;
  115. -- Inverse permutation known answer test
  116. -- Encryption
  117. s_key <= x"0101010101010101";
  118. for index in s_variable_plaintext_known_answers'range loop
  119. wait until rising_edge(s_clk);
  120. s_validin <= '1';
  121. s_datain <= s_variable_plaintext_known_answers(index);
  122. end loop;
  123. wait until rising_edge(s_clk);
  124. s_mode <= '0';
  125. s_validin <= '0';
  126. s_key <= (others => '0');
  127. s_datain <= (others => '0');
  128. wait for 100 ns;
  129. -- Variable key known answer test
  130. -- Encryption
  131. s_key <= x"8000000000000000";
  132. for index in s_variable_key_known_answers'range loop
  133. wait until rising_edge(s_clk);
  134. s_validin <= '1';
  135. if(index /= 0) then
  136. if(index = 7 or index = 14 or index = 21 or index = 28 or index = 35 or
  137. index = 42 or index = 49) then
  138. s_key <= "00" & s_key(0 to 61);
  139. else
  140. s_key <= '0' & s_key(0 to 62);
  141. end if;
  142. end if;
  143. end loop;
  144. wait until rising_edge(s_clk);
  145. s_mode <= '0';
  146. s_validin <= '0';
  147. s_key <= (others => '0');
  148. s_datain <= (others => '0');
  149. wait for 100 ns;
  150. -- Variable plaintext known answer test
  151. -- Decryption
  152. s_key <= x"0101010101010101";
  153. for index in s_variable_plaintext_known_answers'range loop
  154. wait until rising_edge(s_clk);
  155. s_mode <= '1';
  156. s_validin <= '1';
  157. s_datain <= s_variable_plaintext_known_answers(index);
  158. end loop;
  159. wait until rising_edge(s_clk);
  160. s_mode <= '0';
  161. s_validin <= '0';
  162. s_key <= (others => '0');
  163. s_datain <= (others => '0');
  164. wait;
  165. end process teststimuliP;
  166. testcheckerP : process is
  167. variable v_plaintext : std_logic_vector(0 to 63) := x"8000000000000000";
  168. begin
  169. report "# Variable plaintext known answer test";
  170. report "# Encryption";
  171. for index in s_variable_plaintext_known_answers'range loop
  172. wait until rising_edge(s_clk) and s_validout = '1';
  173. assert (s_dataout = s_variable_plaintext_known_answers(index))
  174. report "encryption error"
  175. severity error;
  176. end loop;
  177. report "# Inverse permutation known answer test";
  178. report "# Encryption";
  179. for index in s_variable_plaintext_known_answers'range loop
  180. wait until rising_edge(s_clk) and s_validout = '1';
  181. assert (s_dataout = v_plaintext)
  182. report "encryption error"
  183. severity error;
  184. v_plaintext := '0' & v_plaintext(0 to 62);
  185. end loop;
  186. report "# Variable key known answer test";
  187. report "# Encryption";
  188. for index in s_variable_key_known_answers'range loop
  189. wait until rising_edge(s_clk) and s_validout = '1';
  190. assert (s_dataout = s_variable_key_known_answers(index))
  191. report "encryption error"
  192. severity error;
  193. end loop;
  194. report "# Variable plaintext known answer test";
  195. report "# Decryption";
  196. v_plaintext := x"8000000000000000";
  197. for index in s_variable_plaintext_known_answers'range loop
  198. wait until rising_edge(s_clk) and s_validout = '1';
  199. assert (s_dataout = v_plaintext)
  200. report "decryption error"
  201. severity error;
  202. v_plaintext := '0' & v_plaintext(0 to 62);
  203. end loop;
  204. report "# Successfully passed all tests";
  205. wait;
  206. end process testcheckerP;
  207. i_des : des
  208. port map (
  209. clk_i => s_clk,
  210. mode_i => s_mode,
  211. key_i => s_key,
  212. data_i => s_datain,
  213. valid_i => s_validin,
  214. data_o => s_dataout,
  215. valid_o => s_validout
  216. );
  217. end architecture rtl;