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			Merge pull request #2 from umarcor/ci/update
			
				ci: rename 'test' workflow to 'Simulation'
			
			
				master
			
			
		 
		
		
			
				
				  
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			  3 changed files with 
41 additions and 
19 deletions
			
		 
		
			
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					.github/test.sh
				
 
			
				- 
					
					
					 
					.github/workflows/simulation.yml
				
 
			
				- 
					
					
					 
					README.md
				
 
			
		
		
			
				
					
					
						
							
								
									
										
											
												
	
		
			
				
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					@ -4,14 +4,24 @@ set -e | 
				
			
			
		
	
		
			
				
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					cd $(dirname "$0")/.. | 
				
			
			
		
	
		
			
				
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					run_sim() { | 
				
			
			
		
	
		
			
				
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					case "$1" in | 
				
			
			
		
	
		
			
				
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					  sim) | 
				
			
			
		
	
		
			
				
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					    true | 
				
			
			
		
	
		
			
				
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					  ;; | 
				
			
			
		
	
		
			
				
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					  *) | 
				
			
			
		
	
		
			
				
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					    echo "Unknown test suite '$1'" | 
				
			
			
		
	
		
			
				
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					    exit 1 | 
				
			
			
		
	
		
			
				
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					  ;; | 
				
			
			
		
	
		
			
				
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					esac | 
				
			
			
		
	
		
			
				
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					run_task() { | 
				
			
			
		
	
		
			
				
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					  echo "::group::Test $1" | 
				
			
			
		
	
		
			
				
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					  cd "$1"/sim/vhdl | 
				
			
			
		
	
		
			
				
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					  $MAKE sim | 
				
			
			
		
	
		
			
				
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					  cd "$1"/"$2"/vhdl | 
				
			
			
		
	
		
			
				
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					  $MAKE "$2" | 
				
			
			
		
	
		
			
				
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					  cd ../../.. | 
				
			
			
		
	
		
			
				
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					  echo '::endgroup::' | 
				
			
			
		
	
		
			
				
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					} | 
				
			
			
		
	
		
			
				
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					for item in aes cbcdes cbcmac_des cbctdes ctraes des tdes; do | 
				
			
			
		
	
		
			
				
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					  run_sim $item | 
				
			
			
		
	
		
			
				
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					  run_task "$item" "$1" | 
				
			
			
		
	
		
			
				
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					done | 
				
			
			
		
	
											
										
									
								
							 
						
					 
				 
			
		
		
			
				
			
		
		
			
				
					
					
						
							
								
									
										
											
												
	
		
			
				
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					@ -1,4 +1,7 @@ | 
				
			
			
		
	
		
			
				
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					[](https://github.com/tmeissner/cryptocores/actions?query=workflow%3Atest) | 
				
			
			
		
	
		
			
				
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					<p align="center"> | 
				
			
			
		
	
		
			
				
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					  <a title="GitHub Actions workflow 'simulation'" href="https://github.com/tmeissner/cryptocores/actions?query=workflow%3ASimulation"><img alt="'simulation' workflow Status" src="https://img.shields.io/github/workflow/status/tmeissner/cryptocores/Simulation/master?longCache=true&style=flat-square&label=build&logo=Github%20Actions&logoColor=fff"></a><!-- | 
				
			
			
		
	
		
			
				
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					  --> | 
				
			
			
		
	
		
			
				
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					</p> | 
				
			
			
		
	
		
			
				
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					# cryptocores | 
				
			
			
		
	
		
			
				
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					Cryptography IP-cores & tests written in VHDL / Verilog | 
				
			
			
		
	
	
		
			
				
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