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tmeissner
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cryptocores
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cryptography ip-cores in vhdl / verilog
vhdl
ghdl
osvvm
fpga
testbenches
verilog
cryptography
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175
Commits
1
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1.7 MiB
VHDL
51.3%
Verilog
33.4%
Makefile
10.2%
C
3.5%
Tcl
1.5%
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313a08b6f3
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cryptocores
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cbctdes
/
rtl
/
verilog
History
T. Meissner
4b1f3d11f9
removed internal synced copy of reset_i; set ready to high in reset
10 years ago
..
cbctdes.v
removed internal synced copy of reset_i; set ready to high in reset
10 years ago
des.v
iunitial commit os cbctdes verilog sources
12 years ago
des_pkg.v
iunitial commit os cbctdes verilog sources
12 years ago
tdes.v
removed internal synced copy of reset_i; set ready to high in reset
10 years ago