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cryptocores
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cryptography ip-cores in vhdl / verilog
vhdlghdlosvvmfpgatestbenchesverilogcryptography
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171 Commits
1 Branch
1.7 MiB
VHDL 51.3%
Verilog 33.4%
Makefile 10.2%
C 3.5%
Tcl 1.5%
 
 
 
 
 
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cryptocores/des/sim/verilog
History
T. Meissner 3531c69ce1 add support for ITER & PIPE variations of DES verilog implementation 10 years ago
..
data_input.txt added test data for decryption test cases 12 years ago
data_output.txt added test data for decryption test cases 12 years ago
key_input.txt added test data for decryption test cases 12 years ago
makefile add support for ITER & PIPE variations of DES verilog implementation 10 years ago
tb_des.tcl add acceptin & acceptout ports 10 years ago
tb_des.v add support for ITER & PIPE variations of DES verilog implementation 10 years ago
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