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141 lines
3.9 KiB
141 lines
3.9 KiB
-- ======================================================================
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-- CBC-MAC-DES testbench
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-- Copyright (C) 2015 Torsten Meissner
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-------------------------------------------------------------------------
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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-- ======================================================================
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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entity tb_cbcmac_des is
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end entity tb_cbcmac_des;
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architecture sim of tb_cbcmac_des is
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type t_array is array (natural range <>) of std_logic_vector(0 to 63);
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signal s_reset : std_logic := '0';
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signal s_clk : std_logic := '0';
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signal s_start : std_logic := '0';
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signal s_key : std_logic_vector(0 to 63) := (others => '0');
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signal s_datain : std_logic_vector(0 to 63) := (others => '0');
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signal s_validin : std_logic := '0';
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signal s_acceptout : std_logic;
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signal s_dataout : std_logic_vector(0 to 63);
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signal s_validout : std_logic;
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signal s_acceptin : std_logic;
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component cbcmac_des is
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port (
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reset_i : in std_logic;
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clk_i : in std_logic;
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start_i : in std_logic;
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key_i : in std_logic_vector(0 to 63);
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data_i : in std_logic_vector(0 to 63);
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valid_i : in std_logic;
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accept_o : out std_logic;
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data_o : out std_logic_vector(0 to 63);
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valid_o : out std_logic;
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accept_i : in std_logic
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);
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end component cbcmac_des;
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-- key, plain & crypto stimuli values
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-- taken from NIST website:
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-- http://csrc.nist.gov/publications/fips/fips113/fips113.html
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constant C_KEY : std_logic_vector(0 to 63) := x"0123456789abcdef";
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constant C_PLAIN : t_array := (
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x"3736353433323120", x"4e6f772069732074",
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x"68652074696d6520", x"666f722000000000");
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constant C_CRYPT : t_array := (
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x"21fb193693a16c28", x"6c463f0cb7167a6f",
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x"956ee891e889d91e", x"f1d30f6849312ca4");
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begin
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s_clk <= not(s_clk) after 10 ns;
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s_reset <= '1' after 100 ns;
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StimuliP : process is
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begin
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s_start <= '0';
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s_key <= (others => '0');
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s_datain <= (others => '0');
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s_validin <= '0';
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wait until s_reset = '1';
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s_start <= '1';
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for i in C_PLAIN'range loop
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wait until rising_edge(s_clk);
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s_validin <= '1';
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s_key <= C_KEY;
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s_datain <= C_PLAIN(i);
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wait until rising_edge(s_clk) and s_acceptout = '1';
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s_start <= '0';
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s_validin <= '0';
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end loop;
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wait;
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end process StimuliP;
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CheckerP : process is
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begin
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s_acceptin <= '0';
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wait until s_reset = '1';
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for i in C_CRYPT'range loop
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wait until rising_edge(s_clk);
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s_acceptin <= '1';
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wait until rising_edge(s_clk) and s_validout = '1';
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assert s_dataout = C_CRYPT(i)
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report "Encryption error"
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severity failure;
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s_acceptin <= '0';
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end loop;
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report "CBCMAC test successful :)";
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wait;
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end process CheckerP;
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i_cbcmac_des : cbcmac_des
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port map (
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reset_i => s_reset,
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clk_i => s_clk,
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start_i => s_start,
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key_i => s_key,
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data_i => s_datain,
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valid_i => s_validin,
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accept_o => s_acceptout,
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data_o => s_dataout,
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valid_o => s_validout,
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accept_i => s_acceptin
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);
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end architecture sim;
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