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tmeissner
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cryptocores
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cryptography ip-cores in vhdl / verilog
vhdl
ghdl
osvvm
fpga
testbenches
verilog
cryptography
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1.7 MiB
VHDL
51.3%
Verilog
33.4%
Makefile
10.2%
C
3.5%
Tcl
1.5%
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Torsten Meissner
f30ba5e180
added ip-core: des algorithm as described in fips document 46-3
13 years ago
des/
rtl
added ip-core: des algorithm as described in fips document 46-3
13 years ago
.DS_Store
initial created
13 years ago