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tmeissner
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gatemate_experiments
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blink_with_pll
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2 Commits (3ae59c3b5c723e86893c426333ca42b6a01abc2d)
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T. Meissner
3ae59c3b5c
Use neorv-repo top level instead of local one
2 years ago
T. Meissner
f8ba0b17c2
Add VHDL sim for RTL & Verilog sim for post-syn simulation
2 years ago