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T. Meissner 81be6cfd05 Add CC_CFG_END unit, Use PLL lock & cfg_end for reset 2 years ago
blink Add CC_CFG_END unit, Use PLL lock & cfg_end for reset 2 years ago
lib Initial commit 2 years ago
LICENSE.md Add license 2 years ago
README.md Fix readme 2 years ago

README.md

gatemate_experiments

Ongoing experiments with the Cologne Chip's GateMate FPGA architecture.

Further Ressources