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T. Meissner ee77f92bd3 Add CC_BRAM_20K and CC_BRAM_40K to rtl components package 2 years ago
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rtl_components.vhd Add CC_BRAM_20K and CC_BRAM_40K to rtl components package 2 years ago
sim_components.vhd Refactoring of CC_PLL simulation model 2 years ago
user_components.vhd Add uart_loop design to test gatemate fifo & ram primitives 2 years ago