Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
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[tasks]
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bmc
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[options]
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depth 25
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bmc: mode bmc
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[engines]
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bmc: smtbmc z3
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[script]
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bmc: ghdl --std=08 pkg.vhd sequencer.vhd psl_sere_overlapping_suffix_impl.vhd -e psl_sere_overlapping_suffix_impl
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prep -top psl_sere_overlapping_suffix_impl
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[files]
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../src/pkg.vhd
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../src/sequencer.vhd
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../src/psl_sere_overlapping_suffix_impl.vhd
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