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6 years ago | |
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| .github/workflows | 6 years ago | |
| formal | 6 years ago | |
| src | 6 years ago | |
| LICENSE.md | 6 years ago | |
| README.md | 6 years ago | |
A collection of examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys).
The next two lists will grow during furter development