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tmeissner
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vhdl_verification
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Examples and design pattern for VHDL verification
vhdl
ghdl
osvvm
psl
fpga
testbenches
coverage
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12
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208 KiB
VHDL
58.9%
Makefile
36.1%
Tcl
5%
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vhdl_verification
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osvvm_fsm_coverage
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T. Meissner
a6f68a6e40
Fixed assert error by adding reset in assert precondition
9 years ago
..
Makefile
Fixed path to OSVVM library
9 years ago
osvvm_fsm_coverage.tcl
Initial commit of functional FSM coverage using OSVVM
9 years ago
osvvm_fsm_coverage.vhd
Fixed assert error by adding reset in assert precondition
9 years ago