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tmeissner
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vhdl_verification
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Examples and design pattern for VHDL verification
vhdl
ghdl
osvvm
psl
fpga
testbenches
coverage
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208 KiB
VHDL
58.9%
Makefile
36.1%
Tcl
5%
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vhdl_verification
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psl_test_endpoint
History
T. Meissner
7c1f4b1c4d
Adapt to new GHDL feature to make endpoints visible in VHDL
10 years ago
..
Makefile
Initial commit of PSL endpoint test design
10 years ago
psl_test_endpoint.tcl
Initial commit of PSL endpoint test design
10 years ago
psl_test_endpoint.vhd
Adapt to new GHDL feature to make endpoints visible in VHDL
10 years ago