tmeissner
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cryptocores
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cryptography ip-cores in vhdl / verilog
vhdl
osvvm
fpga
ghdl
testbenches
verilog
179 Commits
1 Branch
Branch: master
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${ item.name }
Create branch ${ searchTerm }
from 'master'
${ noResults }
cryptocores/.gitignore

.gitignore 9B
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  1. .DS_Store