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cryptography ip-cores in vhdl / verilog
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Tree: 5b924ff4e2
cryptocores/cbcdes/sim
Torsten Meissner 5b924ff4e2 expanded simulation time to 200 us for decryption testcases 14 years ago
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makefile expanded simulation time to 200 us for decryption testcases 14 years ago
tb_cbcdes.vhd Revision 1.1 2011/09/25 14 years ago