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cryptocores
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cryptography ip-cores in vhdl / verilog
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T. Meissner 5fff1d89d1 initial commit of verilog simulation environment for tdes core 12 years ago
aes new verily version of ads, startup code only at the moment 13 years ago
cbcdes moved vhdl design files in directory 'vhdl' 12 years ago
cbctdes remove OVL support in older, finished & verified projects 13 years ago
des correct some copy & paste errors in key scheduling process 12 years ago
tdes initial commit of verilog simulation environment for tdes core 12 years ago