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cryptography ip-cores in vhdl / verilog
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cryptocores/des
T. Meissner 9a340f5524 added timescale directive and set it to 1 ns/1 ps 12 years ago
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rtl complete refactoring of the des verilog code 12 years ago
sim added timescale directive and set it to 1 ns/1 ps 12 years ago