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cryptocores
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cryptography ip-cores in vhdl / verilog
vhdlghdlosvvmfpgatestbenchesverilogcryptography
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106 Commits
1 Branch
1.7 MiB
VHDL 51.3%
Verilog 33.4%
Makefile 10.2%
C 3.5%
Tcl 1.5%
 
 
 
 
 
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T. Meissner dd979b5cd3 adapt makefile to new directory structure; new variable SRC_FILES for vhdl sources 12 years ago
aes new verily version of ads, startup code only at the moment 13 years ago
cbcdes remove OVL support in older, finished & verified projects 13 years ago
cbctdes remove OVL support in older, finished & verified projects 13 years ago
des correct some copy & paste errors in key scheduling process 12 years ago
tdes adapt makefile to new directory structure; new variable SRC_FILES for vhdl sources 12 years ago
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