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# gatemate_experiments |
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# gatemate_experiments |
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Ongoing experiments with the Cologne Chip's GateMate FPGA architecture. |
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Ongoing experiments with the Cologne Chip's GateMate FPGA architecture. All experiments are done with teh GateMate FPGA Starter (Eval) Kit. |
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## Designs |
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### blink |
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Simple design which should display incrementing binary numbers with LED1-LED8 of the GateMate FPGA Starter Kit. It uses *CC_PLL* & *CC_CFG_END* primitives of the GateMate FPGA. |
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## Further Ressources |
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## Further Ressources |
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* [GateMate FPGA](https://www.colognechip.com/programmable-logic/gatemate) |
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* [GateMate FPGA](https://www.colognechip.com/programmable-logic/gatemate) |
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* [GateMate FPGA Eval Board](https://www.colognechip.com/programmable-logic/gatemate-evaluation-board) |
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* [GateMate FPGA Eval Board](https://www.colognechip.com/programmable-logic/gatemate-evaluation-board) |
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* [GHDL VHDL Simulation & Synthesis](https://github.com/ghdl/ghdl) |
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* [Yosys Synthesis Suite](https://github.com/YosysHQ/yosys) |