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T. Meissner eb0d52e2d6 Add blink design info and more links to README 2 years ago
blink Add CC_CFG_END unit, Use PLL lock & cfg_end for reset 2 years ago
lib Initial commit 2 years ago
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README.md Add blink design info and more links to README 2 years ago

README.md

gatemate_experiments

Ongoing experiments with the Cologne Chip's GateMate FPGA architecture. All experiments are done with teh GateMate FPGA Starter (Eval) Kit.

Designs

Simple design which should display incrementing binary numbers with LED1-LED8 of the GateMate FPGA Starter Kit. It uses CC_PLL & CC_CFG_END primitives of the GateMate FPGA.

Further Ressources