5 Commits (d63dfe6b4a05b1f28993ba410811d1e3cdc7ef67)

Author SHA1 Message Date
  T. Meissner d63dfe6b4a Update uart_reg to full reg file implementation 2 years ago
  T. Meissner 8cf0e6185c blink & uart_reg designs are working now 2 years ago
  T. Meissner 6cffeef4a5 Rename components.vhd to rtl_components.vhd 2 years ago
  T. Meissner 61affc8b49 Add uart tx/rx modules, add make targets and testbenches for rtl, post-syn & post-imp simulations 2 years ago
  T. Meissner 0e84416a92 Rename uart folder to uart_reg 2 years ago