You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
 
 
 
 
 
T. Meissner d63dfe6b4a Update uart_reg to full reg file implementation 2 years ago
blink blink & uart_reg designs are working now 2 years ago
lib Refactoring of CC_PLL simulation model 2 years ago
uart_reg Update uart_reg to full reg file implementation 2 years ago
LICENSE.md Add license 2 years ago
README.md Add blink design info and more links to README 2 years ago

README.md

gatemate_experiments

Ongoing experiments with the Cologne Chip's GateMate FPGA architecture. All experiments are done with teh GateMate FPGA Starter (Eval) Kit.

Designs

Simple design which should display incrementing binary numbers with LED1-LED8 of the GateMate FPGA Starter Kit. It uses CC_PLL & CC_CFG_END primitives of the GateMate FPGA.

Further Ressources