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3 years ago | |
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| blink | 3 years ago | |
| lib | 3 years ago | |
| uart_reg | 3 years ago | |
| LICENSE.md | 3 years ago | |
| README.md | 3 years ago | |
Ongoing experiments with the Cologne Chip's GateMate FPGA architecture. All experiments are done with teh GateMate FPGA Starter (Eval) Kit.
Simple design which should display incrementing binary numbers with LED1-LED8 of the GateMate FPGA Starter Kit. It uses CC_PLL & CC_CFG_END primitives of the GateMate FPGA.