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psl_with_ghdl
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Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
vhdlghdlpslassertionsformalyosys
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9 Commits
1 Branch
6.6 MiB
VHDL 97.5%
Makefile 2.5%
 
 
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psl_with_ghdl/src
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T. Meissner dec05012d7 Handle ambiguous PLS/VHDL assert, add some hints 5 years ago
..
hex_sequencer.vhd Add 4-bit version of sequencer 5 years ago
pkg.vhd Add 4-bit version of sequencer 5 years ago
psl_always.vhd Handle ambiguous PLS/VHDL assert, add some hints 5 years ago
psl_never.vhd Add tests for formal verification; optimizations; fixes #3 5 years ago
psl_next.vhd Add tests for formal verification; optimizations; fixes #3 5 years ago
psl_next_3.vhd Add tests for formal verification; optimizations; fixes #3 5 years ago
psl_next_event.vhd Add example for next_event operator 5 years ago
sequencer.vhd Add tests for formal verification; optimizations; fixes #3 5 years ago
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