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tmeissner
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cryptocores
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3 Commits (master)
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SHA1
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T. Meissner
4b1f3d11f9
removed internal synced copy of reset_i; set ready to high in reset
11 years ago
T. Meissner
3afaaaf4b2
finished conversion of vhdl design into verilog
11 years ago
T. Meissner
7105d21c74
iunitial commit os cbctdes verilog sources
12 years ago