tmeissner
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cryptocores
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4 Commits (master)

Author SHA1 Message Date
  T. Meissner 2a3fae594f Refactor conditions in counter process; add info about submodule update 3 years ago
  T. Meissner d9d91763bb CTR-AES: Fix counter incr & init; add 1st simple testbench 3 years ago
  T. Meissner a2c530928e Add more VHDL-synthesis Makefiles; use src of des instead of local copies; minor refactoring 4 years ago
  T. Meissner 303bda25e4 Add CTR-AES VHDL design 4 years ago