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T. Meissner 6b1b376932 Use speed instead of moderate FPGA speed grade 2 years ago
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Makefile Use speed instead of moderate FPGA speed grade 2 years ago
tb_uart_loop.v Use random stimuli in uart_loop testbench 2 years ago
uart_loop.ccf Add uart_loop design to test gatemate fifo & ram primitives 2 years ago