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tmeissner
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cryptocores
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cryptography ip-cores in vhdl / verilog
vhdl
ghdl
osvvm
fpga
testbenches
verilog
cryptography
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178
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1
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1.7 MiB
VHDL
51.3%
Verilog
33.4%
Makefile
10.2%
C
3.5%
Tcl
1.5%
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T. Meissner
2f91130184
Add remaining AES functions
* addroundkey() * subword() * rotword() * rcon()
9 years ago
aes
Add remaining AES functions
9 years ago
cbcdes
moved array type definitions out of functions to head of package, instances now also in package head and are constants
11 years ago
cbcmac_des
merge last changes from amc mini repo
10 years ago
cbctdes
removed internal synced copy of reset_i; set ready to high in reset
11 years ago
des
merge last changes from amc mini repo
10 years ago
tdes
added removing of tb_tdes binary and *.o files in clean target
11 years ago
.gitignore
added ignore file
11 years ago
LICENSE.textile
added GPLv2 license file
10 years ago