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gatemate_experiments
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5 Commits (a3cabb7747997cd8282e7c388b3f3eb82febb00a)
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T. Meissner
a3cabb7747
Refactoring of CC_PLL simulation model
2 years ago
T. Meissner
3b6a315a0d
Add user_components.vhd containing generic RTL modules
2 years ago
T. Meissner
6cffeef4a5
Rename components.vhd to rtl_components.vhd
2 years ago
T. Meissner
cfa6f88c55
Add simple gatemate primitives simulation components
2 years ago
T. Meissner
b8d8b791dc
Initial commit
* Add VHDL component library for Gatemate FPGA primitives
2 years ago