T. Meissner
ffe07fd5b4
Add example of until & until_ operators
* Add example for until & until_ operator
* Add formal test for both operators
* Add both operators to supported list
5 years ago
T. Meissner
5e5be8afe6
Add gitignore file
5 years ago
T. Meissner
105d44d7d0
Add example for next_event[n] operator
* Add example for next_event[n] operator
* Add formal test for next_event[n] operator
* Add next_event[n] to supported list
* Add next_event_a[n] & next_event_e[n] to unsupported list
5 years ago
T. Meissner
dec05012d7
Handle ambiguous PLS/VHDL assert, add some hints
5 years ago
T. Meissner
c23f3b4736
Add Github actions config file & badge, fixes #2
5 years ago
T. Meissner
00ac16a888
Add tests for formal verification; optimizations; fixes #3
* Minor optimization in sequencer unit
* Add Makefile & SymbiYosys command files for formal
verification tests
5 years ago
T. Meissner
0923a44b44
Add example for next_event operator
5 years ago
T. Meissner
c6028fd198
Add example for next_event operator
5 years ago
T. Meissner
96c459e027
Add readme and psl_next, psl_next[] operators
5 years ago
T. Meissner
c223fc2037
Add 4-bit version of sequencer
5 years ago
T. Meissner
263dcae830
Add sequencer and first examples
* sequencer for easy waveform generation of
simple 1 bit std_logic signals
* Package with sequencer component delaration
* Examples for always & never operator
5 years ago
T. Meissner
dd500a736f
Initial commit: add license file
5 years ago